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Senior Verification Engineer

AccelerComm·Southampton·Hybrid·Posted today

AccelerComm, a University of Southampton spinout, develops error correction and physical layer IP for 5G, 6G and satellite networks, running on more than 200 satellites. They're hiring a Senior Verification Engineer to lead UVM verification of RTL for advanced wireless communications IP, based in Southampton on a hybrid basis. This ASIC role sits within the UK's semiconductor and satellite communications sector.

Our RTL team delivers efficient ASIC and FPGA implementations of advanced communications algorithms, working across IP development, integration and verification. To support this work, we are looking for a Senior Verification Engineer to support the complete UVM verification of Accelercomm IP. 

Purpose 

Responsible for verification of RTL implementations for advanced wireless communications IP and modem subsystems, ensuring designs meet functional, performance and quality requirements prior to FPGA deployment and ASIC tape-out. 

Key Responsibilities

  •  Develop verification plans from design and architecture specifications. 
  • Create and maintain SystemVerilog/UVM verification environments. 
  • Develop testbenches, assertions, scoreboards and coverage models. 
  • Execute directed and constrained-random verification. 
  • Analyse coverage and debug RTL and verification issues. 
  • Support subsystem and system-level integration activities. 
  • Contribute to automation, regression and CI workflows. 
  • Participate in design reviews and verification sign-off. 
  • Mentor and support junior colleagues

Skills, Knowledge & Expertise

Required 
  • Degree in Electronic Engineering, Computer Engineering or a related discipline. 
  • At least 3 years experience verifying digital ASIC and/or FPGA designs. 
  • Strong SystemVerilog and UVM skills. 
  • Understanding of RTL design principles and hardware implementation. 
  • Experience with coverage-driven and assertion-based verification. 
  • Linux proficiency and scripting skills (Python, Tcl or Bash). 
  • Strong analytical, debugging and problem-solving skills. 
  • Experience using AI to accelerate verification without sacrificing quality 
  • Ability to work across multiple teams
Desirable 
  • Experience in 4G/5G, NTN, satellite communications or DSP systems. 
  • Knowledge of modem architectures and Layer 1 processing. 
  • Experience with Formal Verification, FPGA prototyping and CI environments. 
  • Familiarity with MATLAB or equivalent modelling tools. 

About AccelerComm

AccelerComm is a Southampton-based semiconductor IP company spun out of the University of Southampton's Electronics and Computer Science department in 2016 by Professor Rob Maunder and Dr Taihai Chen. The company commercialises forward error correction and channel coding algorithms for 5G, 6G, and satellite non-terrestrial networks, with products including high-performance LDPC and POLAR error correction IP. AccelerComm's technology powers over 200 production satellites currently in orbit, with customers including Vodafone, Intel, AMD, and National Instruments. The company raised a total of $52.8M, including a £21.5M Series B in 2023 led by ParkWalk, SwisscomVentures, and Hostplus, and a subsequent $15M round in 2025.

Stage: Series BSouthampton
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